== Designing Input and Output Matching Networks ==
Based on the source and load reflection coefficients established in the previous section, you can now design LC matching network sections to be inserted between the base of the BJT and the voltages source and between the collector of the BJT and the load. For the input matching network you will use a shunt inductor L2 and a series capacitor C2 in conjunction with the source resistor R2. Note that the AC voltage source must be shorted for the calculation of the input reflection coefficient. Set up a simple circuit as shown in the figure below and assign a single port between the free node of the series capacitor and the ground. Run a Network Analysis Test of this circuit with the following [[parameters]]. From the results, note that at 1GHz the required source reflection coefficient has been achieved.
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Next, you will use a shunt capacitor C1 and a series inductor L1 in conjunction with the load resistor R1 for the output matching network. Set up another simple circuit as shown in the figure below and assign a single port between the top node of the shunt capacitor and the ground. Run a Network Analysis Test of this circuit using the same [[parameters]] table as above. As you can see from the S11 parameter table, the required load reflection coefficient has been achieved.
<table>