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/* Designing Input and Output Matching Networks */
== Designing Input and Output Matching Networks ==
Based on the source and load reflection coefficients established in the previous section, you can now design LC matching network sections to be inserted between the based base of the BJT and the voltages source and between the collector of the BJT and the load.
For the input matching network you will use a shunt inductor L2 and a series capacitor C2 in conjunction with the source resistor R2. Note that the AC voltage source must be shorted for the calculation of the input reflection coefficient. Set up a simple circuit as shown in the opposite figure and assign a single port between the free node of the series capacitor and the ground. Run a Network Analysis Test of this circuit over 500MHz to 1500MHz with a frequency step size of 500MHz. Choose the "S" Parameter option with Amp/Phase format and only check the "Table" checkbox, not the Graph. This will compute and tabulate the s11 parameter of the matching network at 500MHz, 1GHz and 1.5GHz, as shown in the figure below. Note that at 1GHz the required source reflection coefficient has been achieved.
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