Changes

To understand the operation of the flip-flop circuit, you will use the "Live Digital Timing Diagram" feature of [[RF.Spice A/D]]. As you earned in the previous tutorial lesson, set the step time to 20ns. Set the input initially to In1 = 0. Then, to activate the timing diagram, click the "'''Show/Hide Live Digital Timing Diagrams'''" [[File:b2Timing_Tool.png]] button of the '''[[Toolbars#Schematic_Toolbar |Schematic Toolbar]]'''. Remember that nothing will happen until you start a [[Digital Simulation|digital simulation]]. Click the "'''Step'''" [[File:b2Step_Tool.png]] button of the '''[[Toolbars#Main_Toolbar |Main Toolbar]]''' or use the keyboard shortcut {{key|Ctrl+H}} to advance the simulation time one step at a time. Step the simulation time to 60ns and then change the input to In1 = 1. Keep stepping to 160ns and then change the input to In1 = 0 again. Continue stepping to 400ns and change the input to In1 = 1 once again and then proceed to 600ns. The table below summarizes the input entries:

A shift register is a multi-output digital circuit that transfer the input data to its outputs sequentially at each clock cycle. Cascade the four D flip-flops as shown on the figure by connecting the Q pin of each to the D pin of the next. All four flip-flops share the same clock signal. Use the same clock settings from the previous part (Period = 100ns and Pulse Width = 50ns). Set the step time to 20ns. Enable the live digital timing diagram. Run a [[Digital Simulation|digital simulation]] and step through 1200ns. Set the value of the input "Data" to 0 and change it to 1 at t = 100ns and change it back to 0 at t = 600ns.

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