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Digital Tutorial Lesson 1: Examining Logic Gates

1,389 bytes added, 13:54, 4 November 2015
/* Analyzing the Propagation Delays */
{{projectinfo|Tutorial| Building a Three-Input Digital AND Function |b2TUT4_1DigiTUT1_5.png|In this project, the basic concepts of digital circuit simulation in RF.Spice A/D are demonstrated, and a simple logical AND circuit is built and examined.|
*Digital Circuit
*Live Simulation
*Live Digital Timing Diagram
*Binary State Transition*Propagation Delay|All versions|{{download|http://www.emagtech.com/contentdownloads/project-file-download-repository|ProjectRepo/DigitalLesson1.zip Digital Tutorial Lesson 1|[[RF.Spice A/D]] R15}} }}
=== What You Will Learn ===
In this tutorial you will use generic inverter gates and two-input NAND gates to build a three-input AND circuit. You will learn how to define digital inputs and outputs and use [[RF.Spice]]'s live digital timing diagrams. It is assumed that by this time you have already completed the first few analog tutorial lessons and are comfortable with navigating the [[RF.Spice A/D]] Workshop.
== Placing Digital Parts ==
! scope="row"| Out1
| Digital Output
| 1-bitN/A
|-
! scope="row"| A1 - A2
| Defaults
|-
! scope="row"| A3- A4
| Generic Inverter Gate
| Defaults
<table>
<tr>
<td> [[File:DigiTUT1 1.png|thumb|450px500px|The digital parts placed in the Schematic Editor.]] </td>
</tr>
</table>
<table>
<tr>
<td> [[File:DigiTUT1 2.png|thumb|450px550px|The finished digital circuit.]] </td>
</tr>
</table>
== Testing the Digital Circuit by Stepping Manually ==
 
Digital circuit simulation is a time domain simulation. Furthermore, it is an event-driven simulation. It means that the simulation engine waits for changes in the input(s) of the circuit and then updates the digital state of various nodes in response to those state changes. You can run a time domain simulation in three different modes: '''Step''', '''Walk''' or '''Run'''. "Stepping" increments time a single time step at a time. "Walking" is faster than stepping and increments time by multiple steps at a time determined using a "Walk Factor". "Running" is equivalent to the analog live simulation and continues indefinitely until you pause it or stop it and reset. The first thing you always do in a digital simulation is to set the time step size.
{{Note|In digital circuit simulations, device propagation delays are typically in the order of nanoseconds. It is important to set the step size of the simulation so that each step still allows you to see the resulting changes without slowing the simulation too much. A step size of 20ns is suggested but can be adjusted from there.}}
Digital circuit simulation is a time domain simulation. Furthermore, it is an event-driven simulation. It means that the simulation engine waits for changes in the input(s) of the circuit and then updates the digital state of various nodes in response to those state changes. You can run a time domain simulation in three different modes[[File: '''Step''', '''Walk''' or '''Run'''. "Stepping" increments time a single time step at a time. "Walking" is faster than stepping and increments time by multiple steps at a time determined using a "Walk Factor". "Running" is equivalent to the analog live simulation and continues indefinitely until you pause it or stop it and resetb2TUT4_8. png|thumb|300px|The first thing you always do in a [[Digital Simulation|digital simulationTime Options dialog.]] is to set the time step size. Note Also note that "'''Step Size'''" is different from "'''Step Ceiling'''". Step size specifies how large each time step of the simulation is when using the "Simulation Stepping" feature. Step Size does not factor into the simulation when running the engine in "'''Walk'''" or "'''Run'''" modes, where the simulation engine itself decides how large a step to take. On the other hand, Step Ceiling is the maximum value that you specify for the automatically calculated time step when a simulation is "Walked" or "Run".
To set the step size, go to '''Simulate Menu''' and select the "'''Time Options...'''" to open the Simulation Time Options Dialog. Or click the button labeled "'''{{key|...'''" }} on the '''[[Toolbars#Main_Toolbar|Main Toolbar]]Toolbat''' on the left of the Run button as shown in the figure below. You can also use the keyboard shortcut "Ctrl+I" to open this dialog, which is shown below:
{| border="0"<table>|-<tr>| valign="top"|<td>[[File:b2TUT4_7.png|thumb|left|480px640px|The "Simulation Portion " portion of Main Menu.]]| valign="bottom"|</td>[[File:b2TUT4_8.png|thumb|left|270px|Simulation Time Options Dialog]]</tr>|-|}</table>
Set the "'''Time Step'''" to 20n, leave the "'''Walk Factor'''" at the default value of 2 and close the dialog. Now start the [[Digital Simulation|digital simulation]] by "Stepping" your digital circuit. Click the "'''Step'''" [[File:b2Step_Tool.png]] button of the '''[[Main toolbar|Main Toolbar]]''' or select "Step" from the "'''Simulate Menu'''" or simply use the keyboard shortcut "'''{{key|Ctrl+H'''"}}. The simulation time will increase to 20ns, and the output’s value will change to 0. Note that all your three input inputs have initial values of 0. The state of your circuit is shown in the figure below on the left. Next, change the value of Input 1 to 1 and leave the Input 2 and Input 3 at 0. During a live simulation, you can change the values of inputs by clicking on their "'''{{key|Up'''" Arrow}} and "'''{{key|Down'''" arrow Arrow}} buttons at their right end. Note that by changing the input values, the output doesn't change immediately. This is because you the engine is waiting for you to step the time to compute the next state of the circuit. Click the "'''Step'''" [[File:b2Step_Tool.png]] button or type "'''{{key|Ctrl+H'''" }} one more time. The simulation time increases to 40ns, but the output’s value stays at 0. This is expected as a three-input AND circuit requires all three inputs to be 1 to have an output of 1. The state of the circuit at t = 40s is shown below in the middle figure. Finally, change the values of Input 2 and Input 3 to 1. Step the simulation to 60ns. This time, the output changes to 1 as shown below in the figure on the right. Note that at each time step, the state of all the wires including the output of the NAND gate is displayed on the circuit. The binary states are shown in small black box labels. You can also tell the state of a wire from its color. Blue is 0 and red is 1.
{| border="0"<table>|-<tr>| valign="bottom"|<td>[[File:b2TUT4_9DigiTUT1_3.png|thumb|left|360px550px|State of Circuit the digital circuit at t = 20nswith In1 = In2 = In3 = 0.]]| valign="bottom"|</td></tr><tr><td>[[File:b2TUT4_10DigiTUT1_4.png|thumb|left|360px550px|State of Circuit the digital circuit at t = 40nswith In1 = 1 and In2 = In3 = 0.]]| valign="bottom"|</td></tr><tr><td>[[File:b2TUT4_11DigiTUT1_5.png|thumb|left|360px550px|State of Circuit the digital circuit at t = 60nswith In1 = In2 = In3 = 1.]]|-</td>|}</tr> Note that at each time step, the state of all the wire including the output of the NAND gate is displayed on the circuit.</table>
== Using Live Digital Timing Diagrams ==
[[B2RF.Spice A/D]] allows you to view the state of your digital inputs and outputs graphically in real time using "'''Live Timing Diagrams'''". The digital timing diagrams appear diagram appears at the bottom of the Workshop just like a regular graph. However, these are interactive "live" graphs that change and expand with every time step. For this part of the lesson, you keep the value of "Time Step" at 20ns. First, reset your simulation engine by clicking the "'''Stop/Reset'''" [[File:b2Stop_Tool.png]] button of the [[Main toolbar|Main Toolbar]], or using the keyboard shortcut "'''Ctrl+E'''". Also reset the values of all the three inputs to 0.  To activate the timing diagrams, click the "'''Show/Hide Live Digital Timing Diagrams'''" [[File:b2Timing_Tool.png]] button of the '''[[Schematic toolbar|Schematic Toolbar]]'''. Nothing happens immediately because you haven't started a [[Digital Simulation|digital simulation]] yet. Here is the game plan that you will follow next. You will set the values of each input to 1 sequentially, one at a time. You will increment three time steps between any two actions or events. Then, you will revert the values of the three inputs back to 0 sequentially, one at a time, in the reverse order, until all the three inputs are 0 again. The following table shows the timing of the events:  [[File:b2TUT4_13.png|thumb|800px]]
To activate the timing diagrams, click the "'''Show/Hide Live Digital Timing Diagrams'''" [[File:b2TUT4_14b2Timing_Tool.png|thumb|400px|Property Dialog of the NAND Gate]]button of the '''Schematic Toolbar'''. Nothing happens immediately because you haven't started a digital simulation yet. Here is the game plan that you will follow next. You will set the values of each input to 1 sequentially, one at a time. You will increment three time steps between any two actions or events. Then, you will revert the values of the three inputs back to 0 sequentially, one at a time, in the reverse order, until all the three inputs are 0 again. The following table shows the timing of the events:
{| class="wikitable"
|}
Start the [[Digital Simulation|digital simulation]] with all zero inputs and increment three time steps to 60ns. You will see that four timing diagrams appear at the bottom of the Workshop, one for each input and one for the output. In general every input and output port will have a timing diagram. Then, change the value of Input 1 to 1. Step again and you will see that the timing diagrams immediately get updated because the input states have now changed. Increment two more time steps to 120ns. Then, change the value of Input 2 to 1. Follow this recipe according to the above event table with 60ns intervals until all inputs are set to 0 again. The timing diagrams get updated after each change of state and the final diagrams are shown in the figure abovebelow. With a closer look at the output Note that your timing diagram, you will be able may expand too long to see fit into the propagation delay between the input and output portsbottom graph window. For exampleIn that case, at t = 180ns, when all three inputs are 1, you would expect to see click on the title of the output graph window tab to jump at 1. However, make it take about 20ns for this to happen (at t = 200ns)the active window. To understand this, double-The toolbar changes accordingly. Then click on the NAND gate to open up its property dialog as shown above. You will see that 74LS10D has a "'''Low-to-High Propagation DelayZoom Out Horizontal'''" [[File:b2ZoomOutHoriz_Tool.png]] button of 9ns and a "'''High-the Graph Toolbar to-Low Propagation Delay'''" of 10ns. The 74LS04D Inverter has similar propagation delays. When Input 3 jumps to 1 at t = 180ns, it takes shrink the NAND gate a propagation delay of 10ns to fall from its 1 state down to 0. Similarly, diagram until it takes has the Inverter gate an additional propagation delay of 9ns to rise from its 0 state up to 1. This makes a total delay of 19ns as you can see from the graphright size for viewing.
{{Note|The timing diagram updates only when there is a change of states of the inputs.}}
 
<table>
<tr>
<td> [[File:DigiTUT1 7.png|thumb|720px|The live digital timing diagram.]] </td>
</tr>
</table>
 
== Analyzing the Propagation Delays ==
 
With a closer look at the output timing diagram, you will be able to see the propagation delay between the input and output ports. For example, at t = 180ns, when all three inputs are 1, you would expect to see the output to jump at 1. However, it takes about 19ns for this to happen (at t = 199ns). To understand this, double-click on the NAND gate A2 and inverter gate A4 to open up their property dialogs as shown below. You will see that the generic NAND gate has a "'''Low-to-High Propagation Delay'''" of 11ns and a "'''High-to-Low Propagation Delay'''" of 7ns. The generic inverter gate has a "'''Low-to-High Propagation Delay'''" of 12ns and a "'''High-to-Low Propagation Delay'''" of 8ns.
 
<table>
<tr>
<td> [[File:DigiTUT1 6.png|thumb|540px|The property dialog of the generic NAND gate.]] </td>
</tr>
<tr>
<td> [[File:DigiTUT1 8.png|thumb|540px|The property dialog of the generic inverter gate.]] </td>
</tr>
</table>
 
When Input 3 jumps to 1 at t = 180ns, it takes the NAND gate A2 a propagation delay of 7ns to fall from its 1 state down to 0. Similarly, it takes the Inverter gate A4 an additional propagation delay of 12ns to rise from its 0 state up to 1. This makes a total delay of 19ns as you can see from the graph. At t = 240ns, the reverse of these events happens and gate A2 and A4 undergo the opposite transition types. The total propagation delay is still 19ns, and therefore, the output drops from 1 to 0 at t = 259ns. These events are summarized in the table below.
{| class="wikitable"
|-
! scope="col"| Time
! scope="col"| A2 Transition Type
! scope="col"| A2 Transition Delay
! scope="col"| A4 Transition Type
! scope="col"| A4 Transition Delay
! scope="col"| Total Delay
|-
| t = 180ns
| H -> L
| 7ns
| L -> H
| 12ns
| 19ns
|-
| t = 240ns
| L -> H
| 11ns
| H -> L
| 8ns
| 19ns
|}
<p>&nbsp;</p>
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