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== SPICE Simulation of Analog Circuits ==

An analog circuit consists of a source, one or more passive or active devices and a ground. The sources, devices and the ground are connected to one another using wires. Wires carry electric currents. The interconnections of wires create circuit nodes. Each node has a voltage, and each wire entering a node carries a current. A wire connecting two nodes forces the voltages of those two node to be equal. Analog circuits are governed by Kirchhoff’s current and voltage laws (KCL and KVL). Individual analog devices are characterized by v-i equations, which relate the terminal current(s) of a device to the voltages across those terminals or pins. Passive devices like resistors, capacitors and inductors are governed by linear v-i equations (Ohm’s law), while active devices like diodes and transistors are usually characterized by nonlinear v-i equations.

Sources supply your circuit with known voltages or currents. The voltages and currents at all other nodes of your circuit are the unknowns in an analog circuit simulation. Over the past 30 years, the faculty and graduate students at the University of California, Berkeley, have developed extensive computer algorithms for analog circuit simulation. This project, and the resulting computer code, are known as SPICE. [[RF.Spice A/D]] uses the Berkeley SPICE simulation engine (with a number of modifications and enhancements) for all circuit simulations. Since SPICE's algorithms have been in widespread use by the industry for a long period of time, you can be confident in the accuracy of the results you get from [[RF.Spice A/D]]. We have also incorporated major pieces of the XSPICE program from Georgia Institute of Technology. XSPICE expands the Berkeley SPICE by providing for mixed-mode simulation, a code modeling module that makes it easier to add new models, and inter-process communications. Further, we have modified the DC transfer function to allow for more general parameter sweeps, and we have added Monte Carlo simulations and parameterized AC and transient simulations.

== Analog Circuit Analysis Types ==

* Node voltages converge to within a tolerance of 0.1% or 1 microvolt, whichever is larger.

{| class="wikitable"

! scope="col"| Output Data

|-

| Nonlinear Time-Domain Analysis

| Node Voltages, Branch Currents, Device Powers

| [[Analyzing_Circuits_Using_Predefined_Tests#Network_Analysis | Network Analysis Test]]

| Small-Signal Frequency-Domain Analysis

|-

|}

== Defining Analog & Mixed-Mode Inputs & Outputs ==

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== Setting the Simulation Parameters ==

===Temperature options===

===Convergence options===

For transient convergence, a number of other options are relevant. itl4 controls the number of iterations in the transient solver at a given timepoint. Increase it to a larger value, e.g. 200, to help with convergence but this may not be enough.

Minbreak is the minimum break between timepoints while running a transient simulation. For very sharp transitions, minbreak should be reduced. Breakpoints are inserted by the piecewise linear sources and pulse sources and indicate changes in inputs to the circuit.

Method switches between integration algorithms for calculating capacitor voltages and inductor currents for transient solutions. The possible values are gear for the gear method and trap for the trapezoidal method. The default is trap. Maxord goes along with the gear method and is the maximum order for the multiorder integration method. Higher values of maxord are more accurate but may slow down the simulation.

===Mixed-Mode Circuit Options===

Maxopalter is used in operating point analysis for the maximum alternations between analog and event solutions. Maxevtiter is the maximum number of iterations for event solution. Noopalter prevents the simulator from alternating between analog and event solutions. Ramptime is the transient analysis supply ramping time, but it only seems to be used with xspice models for the capacitor and inductor (rather than the regular spice capacitor and inductor.)

Bypass allows the device calculations to bypass updating values for unchanging elements. I presume that this would speed up the simulation.

For more information on these options, see Inside Spice by Ron Kielkowski published by McGraw Hill.

=== Signal Coverage Options ===

The simulation data directory specifies in which directory temporary data files are written to.

== Additional Considerations for a Successful Simulation ==

Simulation Option : ITL5: This sets the maximum number of total iterations. It defaults to 5000. Try increasing it.

Simulation Option : RELTOL: This is the relative error tolerance. The default is 0.1%. Try increasing it by a factor of 10, to 1.0 %. This is very useful in solving convergence problems due to the small time step of the transient algorithm.

Increase the absolute current tolerance

===Special Notes for the Op Amp===

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