Changes
/* Calculating Port Characteristics At Gap Discontinuities */
A gap source on a metal trace and a probe source on a PEC via behave like a series voltage source with a prescribed strength (of 1V and zero phase by default) that creates a localized discontinuity on the path of electric current flow. At the end of a planar MoM simulation, the electric current passing through the voltage source is computed and integrated to find the total input current. From this one can calculate the input admittance as
:<math> Y_{in} = \frac{I_{in}}{V_s} = \frac {\int_W \hat{y} \cdot \mathbf{J_s} \, dy} {V_s} </math><!--[[File:PMOM54(1).png]]-->
for gap sources on metal traces, where the line integration is performed across the width of the metal strip, and
:<math> Y_{in} = \frac{I_{in}}{V_s} = \frac {\int_S \hat{z} \cdot \mathbf{J_p} \, ds} {V_s} </math><!--[[File:PMOM55.png]]-->
for probe sources on PEC vias, where the surface integration is performed over the cross section of the via. On the other hand, a gap source on a slot trace behaves like a shunt current source with a prescribed strength (of 1A and zero phase by default) that creates a localized discontinuity on the path of magnetic current flow. At the end of a planar MoM simulation, the magnetic current passing through the current source is computed and integrated to find the total input voltage across the current filament. From this one can calculate the input impedance as
