Changes

==Propagation Delays==

The propagation delay of a digital device is the time it takes for the signal to change at the output in response to a change at the input. Each output pin of a digital device has a propagation delay associated with it. The propagation delay of a pin can be affected by the circuit's default fixed delay, the circuit's default delay class, the specific pin's overriding delay or delay class, and the device model's maximum, minimum and typical delays.

The delay actually involves two values, a rise time and a fall time. TPLH (the low-to-high propagation delay) is the time from the input change time to the output change time when the output is going from low to high. TPHL (the high-to-low propagation delay) is the time from the input change time to the output change time when the output is going from high to low. Propagation delays are important because they determine the speed of your circuit, and in circuits with feedback and flip flops and registers, propagation delays can even affect whether or not your circuit works. A digital device's delays can be accessed from its property dialog.

An example showing the delays for the 7404 inverter is shown in the figure on the right. In this case, TPLH = 8ns and TPHL = 12ns. You can see that as the input value changes from 0 to 1 at t = 20ns, the output value changes from 1 to 0 at t = 20 + TPLH = 28ns. subsequently, as the input value changes from 1 to 0 at t = 40ns, the output value changes from 0 to 1 at t = 40 + TPHL = 52ns.

Many digital parts store their states regardless of what is happening at their inputs until a specific input changes value in a specific direction. The 7474 D flip flop is such a device. Its D input can change, but the output will not change until the clock pin rises from zero to one. We call the activating change in the clock pin a "Trigger". For the trigger to work, the circuit must be stable (i.e., inputs must not change) for a specific time period before the trigger occurs. This time is called the "Setup Time". After the trigger, the inputs must be stable for a time period so that the new state is not disturbed. This post-trigger time period is called the "Hold Time". If either the set up or hold time specifications are violated, the program notifies the user and sets the device's output to indeterminate.

==Initial Circuit State==

A digital clock is a periodic pulse generator similar to the analog square wave generator. Many digital devices such as flip flops require a clock for their operation. From a clock's property dialog, you can change its default name and set its period as well as its pulse width. The pulse width is the duration of the high (1) portion of the signal in each period. The clock input itself must have a period of a certain duration in order for dynamic devices to operate properly. This minimum period is expressed in its inverted form as the maximum frequency of a digital device.

==Digital Bus Connectors==

You can edit the pin connections of bus connectors. By default, the wires coming into splitters and combiners are distributed automatically in the following manner. The wires connected to the top pin become the least significant bits of the splitter or combiner. The rest of the wires coming into the splitter or combiner are placed into the higher bits of the splitter or combiner. After the circuit state is updated, the splitter or combiner will display the bit numbers of the wires. The wire distribution can be customized by turning off the "Auto Distribute" checkbox in the bus connector's property dialog and entering the pin numbers manually. The first leg will use the wires in the first dialog box, etc. For example, if you have a 1-to-2 splitter, you can specify that you want bit 0 of the net to go onto the lower pin of the bus connector and bit 1 of the net to go to the upper pin. Multiple bits can be specified for each pin using colons and commas to group bits.

==Additional Considerations==